Product Summary
The HD6417300BLZ120V is a renesas 32-bit risc microcomputer. The main functions of the HD6417300BLZ120V are as follows. The HD6417300BLZ120V One frame consists of 8-bit data and one parity bit. During transmission, a character protection time, set using SCGRD and the LCB and PB bits in SCSCMR, is inserted between the end of each parity bit and the beginning of the next frame. During reception in T = 0 mode, when a parity error is detected, low level is output for a duration of 1 etu as an error signal, 10.5 etus after the start bit. During transmission in T = 0 mode, if an error signal is sampled, after 2 etus or more have elapsed, the same data is automatically transmitted. Only asynchronous communication functions are supported; there is no clocked synchronous communication function.
Parametrics
HD6417300BLZ120V absolute maximum ratings: (1)Analog input capacitance: 20 pF; (2)Allowable signal-source impedance: 5 kΩ.
Features
HD6417300BLZ120V features: (1)Renesas Technology Original SuperH architecture; (2)Upper compatibility with SH-1, SH-2, and SH3-DSP at object code level; (3)32-bit internal data bus; (4)Instruction execution time: One instruction/cycle for basic instructions; (5)Logical address space: 4 Gbytes; (6)Space identifier ASID: 8 bits, 256 logical address spaces; (7)Five-stage pipeline.
Diagrams
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