Product Summary
The 74LVC1G08GV is a high-performance, low-power, low-voltage, Si-gate CMOS device, superior to most advanced CMOS compatible TTL families. Input can be driven from either 3.3 V or 5 V devices. These features allow the use of the 74LVC1G08GV in a mixed 3.3 V and 5 V environment. Schmitt trigger action at all inputs makes the 74LVC1G08GV tolerant for slower input rise and fall time.
Parametrics
74LVC1G08GV absolute maximum ratings: (1)VCC supply voltage: -0.5 to +6.5 V; (2)IIK input diode current VI < 0 V: 50 mA; (3)VI input voltage: -0.5 to +6.5 V; (4)IOK output diode current VO > VCC or VO < 0 V: ±50 mA; (5)VO output voltage active mode: -0.5 to VCC + 0.5 V; (6)Power-down mode: -0.5 to +6.5 V; (7)IO output source or sink current VO = 0 V to VCC: ±50 mA; (8)ICC, IGND VCC or GND current: ±100 mA; (9)Tstg storage temperature: -65 to +150 ℃; (10)Ptot power dissipation Tamb = -40 ℃ to +125 ℃: 250 mW.
Features
74LVC1G08GV features: (1)Wide supply voltage range from 1.65 V to 5.5 V; (2)High noise immunity; (3)±24 mA output drive (VCC = 3.0 V); (4)CMOS low power consumption; (5)Latch-up performance £250 mA; (6)Direct interface with TTL levels; (7)Inputs accept voltages up to 5 V; (8)ESD protection: HBM EIA/JESD22-A114-B exceeds 2000 V, MM EIA/JESD22-A115-A exceeds 200 V; (9)Multiple package options; (10)Specified from -40 ℃ to +85 ℃ and -40 ℃ to +125 ℃.
Diagrams
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![]() 74LV00DB,112 |
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